The present invention relates generally to semiconductor device manufacturing techniques and, more particularly, to fabrication of hybrid double buried oxide (BOX), back gate (DBBG) extremely thin silicon-on-insulator (ETSOI) wafers with enhanced mobility channels.
Fully depleted transistor devices are essential for device scaling. Extremely thin SOI (ETSOI) complementary metal oxide semiconductor (CMOS) transistors with back gate controls have shown advantages with respect to reducing short channel effects (SCE), reducing threshold voltage (Vt) variability due to body doping fluctuations, and using the back gate voltage to adjust/tune the threshold. However, the drive current of such back gated ETSOI devices is limited due to relatively lower carrier mobility in such thin silicon (Si) regions. Although some stress techniques such as the application of stressed contact area (CA) liners may be applied in order to improve the carrier mobility, it is still difficult to form embedded SiGe in the source/drain areas due to the extremely thin Si layer.